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  • Helion IONOS Image Signal Processing IP Portfolio

    IP Core

    Helion IONOS Image Signal Processing IP Portfolio

    Comprehensive, high-quality, highly-configurable ISP solution from Helion Vision, from basic to advanced High Dynamic Range Imaging (HDRI) color pipelines.
    MachXO,LatticeXP2,LatticeECP3,CrossLink,ECP5 / ECP5-5G,CrossLink-NX
    HDR,Image Processing,Video Tx/Rx,Lattice mVision,Automotive
    Helion IONOS Image Signal Processing IP Portfolio
  • Tri-Speed Ethernet MAC Core IP

    IP Core

    Tri-Speed Ethernet MAC Core IP

    Transmits and receives data between a host processor and an Ethernet network. IEEE 802.3 compliant. Supports 10/100/1000 operation.
    ECP5 / ECP5-5G,LatticeECP3,LatticeECP2/M,LatticeXP2,LatticeSC/M,CrossLink-NX,Certus-NX
    Connectivity IP Suite,Data Communication,Ethernet,Ethernet IP Suite,Value IP Suite,Defense,Automotive
    Tri-Speed Ethernet MAC Core IP
  • Soft I2C Bus Master

    Reference Design

    Soft I2C Bus Master

    Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families
    CrossLink,CrossLink-NX,CrossLinkPlus,ECP5 / ECP5-5G,iCE40 UltraPlus,LatticeECP3,MachXO2,MachXO3,Mach-NX
    5G,Computing,IoT,TOR Switch,Bus Controllers,I2C
    Soft I2C Bus Master
  • Soft I2C Slave Peripheral

    Reference Design

    Soft I2C Slave Peripheral

    Implements a soft I2C Slave Peripheral in Verilog, supporting many Lattice FPGA families
    CrossLink,CrossLink-NX,CrossLinkPlus,ECP5 / ECP5-5G,iCE40 UltraPlus,LatticeECP3,MachXO2,MachXO3
    5G,Computing,IoT,TOR Switch,Bus Controllers,I2C
    Soft I2C Slave Peripheral
  • I2C Bus Master

    Reference Design

    I2C Bus Master

    Demonstrates how a fast and configurable I2C-Bus Master Controller can be constructed and utilized in a Lattice CPLD/FPGA device
    MachXO,LatticeXP2,ispMACH 4000ZE,MachXO2,LatticeECP3,Platform Manager,ECP5 / ECP5-5G,MachXO3
    Bus Controllers,I2C,TOR Switch,Home Control Appliances & Security,IoT & Wearables,Notebooks & PCs,Printers,Smart Toys & Robots,平板电脑,5G
    I2C Bus Master
  • I2C Master - WISHBONE Compatible

    Reference Design

    I2C Master - WISHBONE Compatible

    Based on the OpenCores I2C master core, this Reference Design provides a bridge between the I2C and WISHBONE bus
    MachXO,MachXO2,LatticeXP2,LatticeECP3,ECP5 / ECP5-5G,MachXO3
    I2C,Wishbone,Bus Controllers,TOR Switch,Home Control Appliances & Security,IoT & Wearables,Notebooks & PCs,Printers,Smart Toys & Robots,平板电脑,5G
    I2C Master - WISHBONE Compatible
  • DDR3 PHY

    IP Core

    DDR3 PHY

    Connects a DDR3 memory Controller (MC) to a DDR3 memory device (JESD79-3). Contains all the logic required for functions dependent on FPGA DDR IO primitives
    ECP5 / ECP5-5G,LatticeECP3,CrossLink-NX,Certus-NX
    Connectivity IP Suite,DDR*Memory
    DDR3 PHY
  • DDR3 SDRAM Controller

    IP Core

    DDR3 SDRAM Controller

    General-purpose complete memory controller interfaces with industry standard DDR3 memory (JESD79-3 Standard), and provides a generic command interface
    LatticeECP3,ECP5 / ECP5-5G,CrossLink-NX,Certus-NX
    Connectivity IP Suite,DDR*Memory,Ethernet IP Suite,PCIe IP Suite,Value IP Suite,Video IP Suite
    DDR3 SDRAM Controller
  • Color Space Converter (CSC)

    IP Core

    Color Space Converter (CSC)

    Free IP core - supports color space conversion and related CODEC functions from 8-16 bits wide, precision up to 18 bits. RGB YCbCr CMYK and more.
    ECP5 / ECP5-5G,LatticeECP3,LatticeECP2/M,LatticeSC/M,LatticeXP2,CrossLink-NX,Certus-NX
    Image Processing,JPEG CODEC,Video IP Suite,Lattice mVision,UAVs
    Color Space Converter (CSC)
  • PCI Express Endpoint Core

    IP Core

    PCI Express Endpoint Core

    提供了一个PCI Express x1, x2或x4端点处理措施ion from the electrical SERDES interface to the transaction layer
    Certus-NX,ECP5 / ECP5-5G,LatticeECP2/M,LatticeECP3,CrossLink-NX
    Bus Controllers,Connectivity IP Suite,PCIe,PCIe IP Suite,Defense
    PCI Express Endpoint Core
  • PCI Express x1, x4 Root Complex Lite IP Core

    IP Core

    PCI Express x1, x4 Root Complex Lite IP Core

    Provides a x1 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCIe protocol stack
    ECP5 / ECP5-5G,LatticeECP3,LatticeECP2/M,Certus-NX
    Connectivity IP Suite,PCIe,PCIe IP Suite,Guidance Systems
    PCI Express x1, x4 Root Complex Lite IP Core
  • FFT Compiler

    IP Core

    FFT Compiler

    Can be configured to perform forward FFT, inverse FFT (IFFT) or port selectable forward/inverse FFT. High-performance streaming and low-resource burst modes.
    ECP5 / ECP5-5G,LatticeECP3,LatticeECP2/M,LatticeXP2,Certus-NX
    DSP IP Suite,Value IP Suite,Data Communication,DSP,Guidance Systems
    FFT Compiler
  • FIR Filter Generator

    IP Core

    FIR Filter Generator

    Highly configurable, multi-channel FIR filter. Supports up to 256 channels each with 2048 taps. Input and coefficient widths from 4 to 32 bits.
    ECP5 / ECP5-5G,LatticeECP3,LatticeECP2/M,LatticeXP2,CrossLink-NX,Certus-NX
    DSP,DSP IP Suite,Value IP Suite,Guidance Systems
    FIR Filter Generator
  • LatticeMico32 Open, Free 32-Bit Soft Processor

    IP Core

    LatticeMico32 Open, Free 32-Bit Soft Processor

    A 32-bit Harvard, RISC architecture soft microprocessor, available for free with an open IP core license. Many compatible modules and IP are available.
    LatticeECP3,LatticeXP2,LatticeECP2/M
    GPIO Control,Mico,Soft Processor,UART,Wishbone,TOR Switch,Defense
    LatticeMico32 Open, Free 32-Bit Soft Processor
  • SGMII and Gb Ethernet PCS

    IP Core

    SGMII and Gb Ethernet PCS

    Implements the PCS functions of both the Cisco SGMII and the IEEE 802.3z (1000BaseX) specifications
    ECP5 / ECP5-5G,LatticeECP3,LatticeECP2/M,CrossLink-NX,Certus-NX
    Connectivity IP Suite,Data Communication,Ethernet,Ethernet IP Suite,X/S/RGMII
    SGMII and Gb Ethernet PCS
  • CORDIC

    IP Core

    CORDIC

    A simple and efficient algorithm to calculate hyperbolic and trigonometric functions and convert polar co-ordinates to cartesian and vice versa
    ECP5 / ECP5-5G,LatticeECP3,LatticeECP2/M,LatticeSC/M,LatticeXP2,Certus-NX
    DSP,DSP IP Suite
    CORDIC
  • 10Gb+ Ethernet MAC

    IP Core

    10Gb+ Ethernet MAC

    Transmits and receives data between a host processor and an Ethernet network, compliant to IEEE 802.3-2005 standard
    ECP5 / ECP5-5G,LatticeECP3,LatticeSC/M,LatticeECP2/M
    Connectivity IP Suite,Ethernet,Ethernet IP Suite,Defense
    10Gb+ Ethernet MAC
  • Scatter-Gather DMA Controller

    IP Core

    Scatter-Gather DMA Controller

    Implements a configurable, multi-channel, WISHBONE-compliant DMA controller with scatter-gather capability
    ECP5 / ECP5-5G,LatticeECP3,LatticeECP2/M,LatticeSC/M,LatticeXP2
    Bus Controllers,Connectivity IP Suite,DMA,Ethernet IP Suite,PCIe IP Suite,Defense
    Scatter-Gather DMA Controller
  • 视频帧缓冲

    IP Core

    视频帧缓冲

    Highly-configurable solution buffers video data in external memory, supports image sizes up to 4K x 4K with YCbCr 4:2:2, 4:4:4 and RGB video formats
    ECP5 / ECP5-5G,LatticeECP3,LatticeECP2/M,LatticeXP2
    Image Processing,Parallel Video,Video Tx/Rx,Lattice mVision,Home Control Appliances & Security,IoT & Wearables,Notebooks & PCs,Printers,Smart Toys & Robots,平板电脑
    视频帧缓冲
  • XAUI 10Gb Ethernet Attachment Unit Interface

    IP Core

    XAUI 10Gb Ethernet Attachment Unit Interface

    A complete configurable XAUI-to-XGMII solution. Implements 10Gb Ethernet (XGXS - IEEE 802.3ae-2002) and SERES-based PCS.
    ECP5 / ECP5-5G,LatticeECP3,LatticeECP2/M
    Connectivity IP Suite,Data Communication,Ethernet,Ethernet IP Suite,X/S/RGMII,XAUI,Defense
    XAUI 10Gb Ethernet Attachment Unit Interface
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