合作伙伴关系的重要性：晶格和我们的IP合作伙伴

有一个古老的俗话说，两个人比一个人好，而在战略伙伴关系方面，没有什么比这更真实的了。在当今的商业环境中，合作伙伴关系对专注于支持最终客户的组织具有最大的价值。bob电子竞技俱乐部合作伙伴必须具有协同效应并增强集体价值主张，以为客户带来利益。合作伙伴应共同努力，通过知识转移或能力建设来加强各自的业务。

For an FPGA company like Lattice, requests for different functions from different market segments are very common. Many of these applications require some standard functionality that can be implemented in the FPGA. Some of these functions can be standard, while others may be very unique and specific to the industry. These vary from networking IPs, like Local Interconnect Network (LIN) and Controller Area Network for the automotive segment, to High Definition Range Image Signal Processing (HDR ISP) for cameras and displays, and DisplayPort compliant interfaces for the modern LCD panels for industrial and consumer segments. All of these IPs are very unique and require the organizations to invest into acquiring knowledge and expertise. By partnering with organizations that are experts in such IPs allows companies to bring the capability and overall value to the end-customers faster.

在过去的几年中，我们与许多IP设计合作伙伴联手将经常要求的功能带入了各种低功率，生产价格的FPGA。我们的第三方生态系统中提供的IPS为各种产品提供了支持，包括世界上最小的产品bob电子竞技俱乐部ICE40 FPGAseries, to the very capable, lowest-power, SERDES-based FPGAs likeECP5。这些合作伙伴已根据各种感兴趣的IP进行了仔细的选择，以及许可模型，支持结构以及易于集成到末端系统中。bob电子竞技俱乐部在此博客中，我想bob88体育登陆讨论一些我们一些基于软件的IP合作伙伴关系，这些IP合作伙伴关系为我们的FPGA带来了新的功能。

CAST, Inc.

One of our oldest partners, CAST, Inc., has been in business for more than a decade and a half. They provide a variety of pre-designed and pre-verified IP cores that save on development time and add functionality. Their key mantra is to enable design reuse methodology, which keeps the overhead costs low, and they are a very user-focused organization that is highly committed to customer satisfaction and support. They are always eager to port any of their IPs to Lattice FPGAs. Here are few that they have recently made available.

控制器区域网络控制器

Originally proposed in the 1980s by Robert Bosch GmbH, Controller Area Network (CAN) was a widely used automotive networking standard before it’s standardization by ISO in 1993. As the need for faster data rates grew, Bosch took an active initiative in extending it to CAN 2.0 and CAN-FD (flexible data rate). CAN is extensively used in a modern vehicles, which may have as many as 70 electronic control units (ECU) for various subsystems. Engine control unit, transmission, airbags, antilock braking/ABS, cruise control, electric power steering, audio systems, power windows, doors, mirror adjustment, battery and recharging systems for hybrid/electric cars are some of the examples of the system that communicate over CAN bus.

演员CAN Controller IP corehas been available for a variety of Lattice FPGAs. CAN protocol bus controller performs serial communication according to CAN 2.0 and CAN FD specifications. It supports the original Bosch protocol and ISO specifications as defined in ISO 1989, including time-triggered operation (TTCAN) as specified in ISO 19898-4. It is also optimized to support the popular AUTOSAR and SAE J1939 specifications.

Local Interconnect Network (LIN)

Lin是汽车平台上最古老的网络协议之一。这是一种串行网络协议，用于车辆中组件之间的通信。随着汽车中实施的技术和设施的增长，对廉价串行网络的需求（与CAN相比）出现。在1990年代，林联盟是由五家汽车制造商（BMW，大众集团，奥迪集团，沃尔沃汽车，梅赛德斯 - 奔驰）创立的，并从火山汽车汽车集团和摩托罗拉提供了技术（网络和硬件专业知识）。最有趣的是，该技术仍用于当今的汽车，用于传感器灯/图标，例如安全带，巡航控制，气候控制，无线电，小型电动机和控制面板。

演员LIN Controller core offers a microcode-free design developed for reuse in FPGA implementations. This core can be configured for master or slave functionality, and has been tested, verified and has been in production.

JPEG Compression IP Cores (Baseline and Extended)

全部of us are aware of the JPEG or JPG files for our photographs. If you have used a digital camera that allows RAW format images, you probably know that the file size can be almost 10x the size of the JPEG file. It is a commonly used method, albeit a lossy compression for digital images, where the degree of compression can be adjusted, allowing a selectable tradeoff between storage size and image quality.

CAST has two IP cores for the hardware-based JPEG compression. The JPEG-E-S Encoder produces compressed JPEG images and the video payload for Motion-JPEG container formats. It accepts images with 8-bit color samples and up to four color components, in all widely-used color subsampling formats. Customers with a short time to market priority can use CAST’s IP Integration Services to receive complete JPEG subsystems. The core is designed with industry best practices, and its reliability and low risk have been proven through both rigorous verification and customer production. Its deliverables include a complete verification environment and a bit-accurate software model.

氦核活力ion, GmbH

氦核活力ion, a company founded in 2003, offers more than 15 years of experience in image pre-processing-ISP and adds special knowledge of High Dynamic Range (HDR) image processing to the fields of automotive, medical, security and industrial. They have implemented and designed advanced IP-Cores for real-time image pre- and post-processing in FPGA devices.

Lattice and Helion Vision have worked together in the past on IONOS Image Signal Processing (ISP) forLatticeECP3devices. Now, we have brought this state-of-the-art ISP pipeline to our ECP5 devices.

IONOS Image Signal Processing

氦核活力ion’s离子IP内核provide plug and play processing solutions utilizing a library of over 100 individual IP cores. IONOS provides pre-configured, ready-to-use ISP by utilizing a portfolio of IP cores for customized camera systems, imaging modules, and complete camera and display systems for the automotive, medical, security and industrial markets. With over a decade of experience in research and development, Helion Vision offers a wide variety of design services to make camera development efficient, fast and agile.

氦核活力ion's IONOS ISP is a user-configurable ISP Pipeline IP, and is image sensor interface independent. It also supports various transmit interfaces to panels, applications processors or SoCs.

比特克西班牙SL

One of Lattice’s recent partnerships has been with BITEC for a popular display interface – DisplayPort. Bitec was founded in 2002 with the aim of providing high-quality technology advice to customers worldwide. Bitec is headquartered in Marbella, Spain. In more than 10 years of activity, BITEC has conducted numerous international projects of large-scale research, development and innovation worldwide both consulting (developing projects for clients) as well as internally, having repeatedly taken concepts to production.

DisplayPort 1.4a IP Core

DisplayPort (DP) is a digital display interface developed by a consortium of PC and chip manufacturers, and standardized by the Video Electronics Standards Association (VESA). The interface is primarily used to connect a video source to a display device such as a computer monitor, and it can also carry audio, USB, and other forms of data. DisplayPort was designed to replace VGA, DVI, and FPD-Link and provides backward compatibility with other interfaces, such as HDMI and DVI.

The Bitec DisplayPort IP core for ECP5 FPGAs enables manufacturers to rapidly develop and deliver displays offering a superior viewing experience within ever-shrinking product lifecycles. The IP core accepts 1, 2 or 4 lanes at either 1.62 or 2.7 Gbps link rate, in compliance with theDisplayPort 1.4规格。核心还嵌入了兼容的DisplayPort（EDP），并包括EDP的额外费率。

Conclusion

Partnerships, some of which are discussed above, are strategically important to Lattice; and for any business for that matter. A good partnership provides a business competitive edge, access to additional resources, supports customer-base growth, and enables access to new product and services. Our partners bring value to our customers which helps us mutually reach a new market and strengthen business for both.

A strategic partnership is always greater than the sum of its parts. Two heads are better than one and success comes when we work together.