CrossLink-NX FPGAs Dominate in Competitive Testing

当我们最初在2019年宣布FPGA的CrossLink™-NX家族时，Lattice的研发团队进行了许多基准测试，以确认这些设备确实和我们想象的一样好。好吧，最新结果是在基于晶格Nexus™平台的Crosslink-NX FPGA中，甚至比我们预期的要好！

The Nexus Platform

简而言之，Lattice的Nexus平台基于28 nm完全耗尽的硅 - 固定器（FD-SOI）工艺。该过程提供了两个重要的优势 - 辐射弹性和功率/性能灵活性 - 两者都为基于SRAM的FPGA市场提供了巨大的区别。

Since the FD-SOI process is deployed fully depleted, it's more resilient to radiation effects like single event upsets (SEUs) and single event transients (SETs). Furthermore, the FD-SOI process is immune to single event latch-up (SEL) conditions, which means there is no down-time in mission-critical situations that would normally demand a power cycle to exit the latch-up state. With regard to power/performance flexibility, by varying the biasing of the substrate on Nexus FPGAs, developers can decide whether they wish to run in high-performance (HP) or low-power (LP) mode.

CrossLink-NX FPGAs

CrossLink-NX is the first of Lattice's FPGA families to be implemented using the Nexus platform. Featuring best-in-class low power MIPI D-PHY performance (MIPI being a popular I/O standard for use in AI and ML applications requiring the processing of image data), the CrossLink-NX FPGA family was specifically designed to enable smart vision and embedded video applications. For the purposes of this blog, we will consider three of the competitive advantages provided by CrossLink-NX FPGAs and show how these devices outperform the competition in terms of low-power, instant-on, and radiation tolerance.

Low-Power:Minimizing power consumption is extremely important, especially in the case of mobile, hand-held, battery-powered devices, and in devices located at the edge of the Internet of Things (IoT).

To confirm the power advantage of CrossLink-NX FPGAs, Lattice engineers compared a CrossLink-NX-40 device to the closest comparable devices from our competitors -- namely a Xilinx Spartan-7 50 and an Intel Cyclone 10LP 40.

Table 1: CrossLink-NX FPGAs provide up to 75% power reduction as compared to competitor offerings.

The results, summarized in Table 1 show that CrossLink-NX FPGAs provide up to a 75 percent power reduction in comparison to the competition.

即时：There are two things to consider with regard to the time it takes for an SRAM-based FPGA to be powered up -- the time for the inputs/outputs (I/Os) to be configured (a.k.a. I/O Configuration) and the time it takes for the programmable fabric to be configured from an external flash memory device (a.k.a. Self-Configuration).

Since FPGAs are often used in a first-on, last-off role to control the power-sequencing of other components in the system, it’s important that their I/Os achieve stable configuration as soon as possible.

To confirm the configuration speed advantage of CrossLink-NX FPGAs, we compared a CrossLink-NX device a Xilinx Spartan-7 and an Intel Cyclone 10LP.

Table 2: CrossLink-NX FPGAs provide up to 55x better I/O configuration instant-on as compared to competitor offerings.

The results summarized in Table 2 show that -- based on both an analysis of the competitors’ datasheets and a head-to-head demonstration -- CrossLink-NX FPGAs provide up to 55x better instant-on time with regard to their I/O configuration and up to 21x better instant-on time with regard to their self-configuration.

Radiation Tolerance:Radiation-induced errors like single event upsets -- in which a register element or a memory cell flips from a logic 0 to a logic 1, or vice versa -- are referred to as “soft errors” because they can be corrected.

In the context of this paper, the soft error rate (SER) is the rate at which a device encounters soft errors caused by radiation. Designers of mission-critical and safety-critical systems express the SER in terms of the number of failures-in-time (FIT) rate. The FIT rate of a device is the number of failures that can be expected in one billion (10⁹) device-hours of operation, (e.g., 1 device for a billion hours, 1000 devices for 1 million hours each, 1 million devices for 1000 hours each, or some other combination thereof).

To confirm the radiation tolerance advantage of CrossLink-NX FPGAs, we compared a CrossLink-NX device to the closest comparable device from one of our competitors in the form of a Xilinx Spartan-7 (unfortunately SER data for the Altera Cyclone 10LP is not available to us at this time).

Table 3: Real-world test data shows the CrossLink-NX FPGAs provide well over 100x better SER (FIT) performance.

The results summarized in Table 3 show that CrossLink-NX FPGAs provide well over 100x better “raw” SER (FIT) performance. However, there is more to this story, because CrossLink-NX FPGAs augment the radiation tolerant FD-SOI process with additional technologies that benefit reliability like error-correcting code (ECC) memory, soft error detection (SED), and soft error correction (SEC).

In other CrossLink-NX news, Lattice is proud to announce that the CrossLink-NX family of FPGAs赢得了2020年嵌入式解决方案产品奖at the Electronic Industry Awards. Lattice would like to thank the Electronics Industry Awards for recognizing the CrossLink-NX FPGA for its versatility and the superior value it brings to the marketplace.